[sdiy] DCO Question

paula at synth.net paula at synth.net
Thu Nov 2 16:39:04 CET 2017


Tim,

Do you mean DCO?
I.e. a ramp generator with the reset time controlled by a CPU?

or do you mean DDS/NCO ?

Paula

On 2017-11-02 15:26, Tim Ressel wrote:
> Hi,
> 
> I am making a digital oscillator (DCO) and was wondering if there is a
> way to reduce the jitter one gets at higher frequencies. I understand
> it comes from round off error (for lack of a better term): as the
> accumulator reaches the top of the range the remaining amount is less
> than the value being added, and that fraction changes every cycle.
> This causes jitter, or is it aliasing? Anyway, is there a clever way
> to deal with it?
> 
> Thanks!



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