[sdiy] Mixed-signal problems (dsPIC digital delay project)
tom at electricdruid.net
Thu Jan 26 19:59:05 CET 2017
On 26 Jan 2017, at 17:20, Roman Sowa <modular at go2.pl> wrote:
> There's only one PCB side shown, so my comments may not apply completely depending what's on the other one.
> 100n power decoupling caps for PIC are connected in very peculiar way, one of the leads is always so mazed adding so much inductance that the cap is nearly pointless there.
There's a 100n at both ends of the dsPIC. I agree the trace for the one connected to pin 28 is perhaps a little long (the AVdd supply) but the other one is about as direct as it can be (the digital Vdd supply on pin 13).
There's additional decoupling for both supplies by the regulators themselves, but that's different.
> If you use internal PIC ADC, you should treat it as ADC, so connect analog and digital GND at the PIC, not at star ground somewhere else. PIC GND should be your star GND point, not power supply input, or do what Paul Maddox says.
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