[sdiy] Hardware convolution box?

Thomas Strathmann thomas at pdp7.org
Mon Feb 13 10:32:49 CET 2017


On 12/02/17 22:39, rsdio at audiobanshee.com wrote:
> So, when combining FIR and FFT processing for convolution, you'll
> need MAC, bit-reversed addressing, automatically-wrapped buffer
> pointers, and possibly other special instructions for maximum
> efficiency at a given instruction clock rate. Hopefully the DSP you
> choose will have example code in optimized assembly for a partitioned
> convolution, and you won't have to piece all of this together
> yourself. Yes, you could do it all in Standard C on a general purpose
> ARM or XMOS, but you'll need a higher clock rate and more code to do
> the same amount of work.

I'm wondering: How precious would development time hav to be to warrant 
going with a DSP and optimized assembly code instead of taking the more 
blunt approach with a fast CPU and some plain C code? From following 
this discussion I get the impression that the answer to that question is 
"Very" but is that true?

	Thomas



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