[sdiy] Novation peak NCOs

[Richie Burnett]

Yeah, there's certainly the potential for crosstalk between adjacent pins at 24MHz, but it can probably be largely mitigated by careful PCB layout and interleaving of grounded pins/traces between I/O lines like they used to do on high speed IDE ribbon cables.

Noise on the FPGA's digital supply rail modulating the logic '1' output level would be a concern too, unless the logic output is used to switch a clean analogue reference. 

-Richie,

Sent from my Xperia SP on O2

---- Olivier Gillet wrote ----

>One thing I'm wondering though...
>
>How good would a FPGA I/O pin work a 1-bit DAC? Isn't there, for
>example, a risk of cross-talk from adjacent pins?
>
>Or is it just a matter of using a buffer (with good decoupling,
>possibly a separate power rail) to get a cleaner signal?