[sdiy] Novation peak NCOs

Eric Brombaugh ebrombaugh1 at cox.net
Fri Apr 21 21:38:26 CEST 2017


"Bit Bang" is usually a term that's used to describe implementing some 
communications protocol in software, toggling GPIO pins and testing bits 
to achieve input and output. In my case there is no processor and 
software involved - I built an actual SPI interface out of FPGA gates 
which serves my purposes with no additional features I don't need. Not 
really "Bit Banging" in the usual sense.

Eric

On 04/21/2017 08:10 AM, MTG wrote:
> Regarding "your" SPI interface, do you mean bit-bang?  I've done this in
> cases too where it's easier to get a solid result out of simple and
> reliable code re-use rather than what can be a complex set of ISR's for
> a simple task.
>
>
> On 4/21/2017 7:41 AM, Eric Brombaugh wrote:
>> As Neil noted earlier, "hardened" I2C and SPI means that there are IP
>> cores for these functions included on the part which are built with
>> dedicated circuits and don't require you to code them up on the FPGA
>> fabric. I haven't used these in any of my work as I already have a SPI
>> interface that works for my purposes and the hardened blocks have
>> features I don't need that makes controlling them more work than I
>> wanted to do.
>>
>> Although I haven't tried it, I suspect that the 1K part should drop
>> right in to that board without changes.
>>
>> Eric
>>
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