[sdiy] How DCOs work

[Colin f]

> -----Original Message-----
> From: Tom Wiltshire [mailto:tom at electricdruid.net]
> Sent: 10 October 2016 16:04
> Cc: 'synth-diy DIY' <synth-diy at dropmix.xs4all.nl>
> Subject: Re: [sdiy] How DCOs work

> Agree. Which is interesting because the DeepMind12 *does* implement
> audio-rate FM on the DCOs (or some of them, at least). I think it's
probably
> only done with the LFO at the fastest rates, but given that you can't
update a
> 100Hz bass waveform any quicker than 10 msec, I don't see really how
> they've managed it - if they really have. Until I get to play with one, I
won't
> know for sure - it could be that the FM just breaks if you do it on lower
> frequencies.

It'd be a lot easier just to generate the waveform in DSP and output through
an audio DAC.
If you're going to change the ramp current during the cycle, you'd need
band-limiting etc. to avoid artefacts there, so it would make more sense
just to go DSP and be done with it.
Unless you were trying to convince people your design was more "analogue"
than it really was.
 
> Once upon a time, the fundamental limitation of DCOs would have been the
> discrete frequency steps, but with high frequency clocks and 32-bit
counters,
> that's no longer an issue.

Indeed. You can get CPUs with 8 x 32bit timers and >100MHz clocks for a
couple of bucks :)
 
> Still, it can't be impossible to update the charging CV and the counter
value
> during a cycle these days. You'd have to work out what the required count
> should be given the new final count, but modern processors can do that
> quickly enough. So maybe the problem isn't insoluble.

A free running hardware timer will have a very precise period, but as soon
as you start programmatically changing the registers mid-cycle, you're going
to run into the possibility of making the change at a time that will
introduce jitter or other instability.
We'll see...

Cheers,
Colin f