[sdiy] 1v /oct with ADC question

[mskala at ansuz.sooke.bc.ca]

On Wed, 30 Nov 2016, Mike HEQX wrote:
> Yeah, it's more like a player piano so I really only need 61 actual binary
> values. I also need the CV out and it just seems so convenient to pick that
> off of the
>
> pot. It looks like the CV will have to generate 64 values at full scale, but
> there will be 3 extra notes on the binary side. That's not ideal in this case.

If you want the ADC output to have *only* 61 values, just decrease the
maximum voltage on the pot to 61/64 of the ADC's full-scale voltage (for
example, 4.766V if full scale is 5.000V), or increase the full-scale
voltage of the ADC to 64/61 of the pot's maximum voltage (for example,
5.246V if the pot's maximum is 5.000V).  Either way, it'd be a good idea
to have a trimmer on the voltage you're fudging, so that you can adjust it
to compensate for stuff like ADC nonlinearity.

-- 
Matthew Skala
mskala at ansuz.sooke.bc.ca                 People before principles.
http://ansuz.sooke.bc.ca/