[sdiy] Dual Transistor Expo-Converter Question

[Richie Burnett]

It implements something called "dominant pole compensation" around the 
negative feedback loop of the servoing op-amp, to keep it from going 
unstable.  Rather than me type loads to explain it, there's a good 
explanation here:

https://en.wikipedia.org/wiki/Frequency_compensation#Dominant-pole_compensation

If you didn't put the capacitor there to roll-off the gain of the op-amp at 
a sufficiently low-frequency then the poles of the op-amp's open-loop 
response combined with any additional phase lag introduced by the 4k7 
resistor and the transistor pair could contribute enough total phase lag 
around the amplifier to make it go unstable (oscillate at some high 
frequency.)

Or, if the control theory is a bit too heavy to work through, try starting 
with no capacitance at all here and increase it in steps until the amplifier 
stops oscillating at some ridiculously high frequency.  Then double this 
capacitance value to give you some additional gain margin.

-Richie,

-----Original Message----- 
From: Nils Pipenbrinck
Sent: Sunday, May 22, 2016 5:04 PM
To: Synth DIY
Subject: [sdiy] Dual Transistor Expo-Converter Question

Hi folks,

I have a question about a little detail in dual transistor expo converters.

Often you'll see an opamp working as a servo to keep one collector at a
fixed voltage. For example the OpAmp A4 in René Schmitz MS20 VCF schematic:

   http://www.schmitzbits.de/rs20.png

You'll see a capacitor from A4's output to the negative input terminal.

Q: What is the purpose of this capacitor and how should I dimension it?
I've seen anything from nanofarads down to few picofarads used. What do
I trade off when I make it larger or smaller?


Best,
   Nils


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