[sdiy] Dual Transistor Expo-Converter Question

[Jean-Pierre Desrochers]

It looks like the 4.7n cap here acts as a 'damper' for any spurious
change in the incoming control voltages anywhere in the CV mixing 
circuit.
The more cap value the more 'portamento' effect in the VCO final freq.
The less cap value, more prone to oscillations and unstable behaviours..
low nanofarad value looks a good 'in between' value.

JP


Le 2016-05-22 12:04, Nils Pipenbrinck a écrit :
> Hi folks,
> 
> I have a question about a little detail in dual transistor expo 
> converters.
> 
> Often you'll see an opamp working as a servo to keep one collector at
> a fixed voltage. For example the OpAmp A4 in René Schmitz MS20 VCF
> schematic:
> 
>   http://www.schmitzbits.de/rs20.png
> 
> You'll see a capacitor from A4's output to the negative input terminal.
> 
> Q: What is the purpose of this capacitor and how should I dimension
> it? I've seen anything from nanofarads down to few picofarads used.
> What do I trade off when I make it larger or smaller?
> 
> 
> Best,
>   Nils
> 
> 
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