[sdiy] Non maximal-length LFSR

Richie Burnett rburnett at richieburnett.co.uk
Fri Mar 4 11:43:45 CET 2016

Hi Brian,

Thanks for your comments/suggestions.  Some answers interspersed below...

> My problem is two-fold:
> A) that you're XOR'ing two "bits" that are adjacent. If you look at 
> r250.c, that example takes bits that are very far apart. As I mentioned in 
> my first reply, I usually see at least two bit cells between each bit that 
> is taken for the XOR, and certainly more than 0.

The two taps don't have to be adjacent.  I think I just used that as an 
example in my pseudo-code.  I can move them apart when I know which tap 
locations are best.

> B) I don't understand why your LFSR length has to be related to your 48 
> kHz sample rate. You're not using more than one word of your 48-word 
> buffer, are you?

Yes.  That's why I want the LFSR lengths to be 48-bits each, and the noise 
output buffer to be 48 words long.  Because then they can be *the same* 
buffer in memory.  The sixteen parallel LFSRs that are bit-sliced across 48 
words of memory generate their random words straight into what will then be 
called the "noise output buffer" containing 1ms worth of white noise at 
48kHz sample-rate for use later.

> As I've mentioned, the length is deceiving.
> Thinking in terms of 1-bit LFSR implementations for now - not your 
> improved 16-bit LFSR - each iteration only produces 1 bit. It doesn't 
> matter how long the sequence is: an iteration only produces 1 bit. The 
> length is merely used to increase the length before the 1-bit pattern 
> starts repeating. If you try to use more than 1 bit for a single 
> iteration, then those bits will be correlated by definition, because 
> they're merely (phase) shifted.

I'm only using one bit from each LFSR at each iteration.  For a given 16-bit 
word of noise the LSB will be a bit from the first LFSR, the next most 
significant bit will be from the next LFSR, until we have one bit from each 
of the 16 parallel LFSR instances.  So each noise word only uses one bit 
from each LFSR for one sample.  For the next audio sample all of the sixteen 
parallel implemented LFSRs produce one new bit, and together they make up a 
brand new 16-bit audio sample.

> In your implementation, the LFSR produces 16 bits per iteration.

No.  Each of *sixteen* separate parallel LFSRs produces *one* bit for each 
iteration.  Together they make up a 16-bit word.

> You can use only 1 word per iteration. Attempting to make the register 48 
> words long so that you can produce 48 samples means that your samples will 
> be phase-shifted copies of each other. Much less random than if you 
> executed 1 iteration per sample.

I'm only extracting one bit from each LFSR at each iteration, and by the 
definition of the LFSR that is what it produces:  Just one new random bit 
for each iteration of the algorithm.  I want 16 bits per iteration, so I'm 
effectively just running 16 instances of the LFSR algorithm in parallel to 
get them.  The fact that all this can be achieved with two instructions and 
the DSPs built-in modulo addressing makes its efficiency appealing to me.


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