[sdiy] nice Digi Pot

[rsdio at audiobanshee.com]

W dniu 2016-06-28 o 00:18, Vladimir Pantelic pisze:
> On 27.06.2016 23:48, jays at aracnet.com wrote:
>> Off the top of my head the only thing that I can think of is the
>> amount of time
>> to do the operation.
> 
> that is one reason, but having to use only a few pins to control a lot
> of devices is another. if I want to control 64 of these digipots I would
> need 64 chip select pins or some external logic to make some kind of 1
> to 64 demuxer. with daisy chaining I would need only CS/CLK/MOSI and be
> done. add DMA pushing data to SPI and you even have zero CPU overhead....

DMA is an amazing technology, and it's great to design with, but be careful how much you expect from "zero" overhead.

DMA does tie up the memory bus while it is accessing. This might cause a problem when pushing a chip to its limits because the CPU can't use that bus at the same time.

I have designed with the TMS320VC5506 DSP, which has 3 independent read busses and 2 independent write busses. In addition, the 128K SRAM is divided into 8K blocks, where each block can be simultaneously accessed. This means that you could literally have 5 memory transfers going on at the same time, provided they're not tripping over each other by accessing the same resource. I used this to generate 32 separate waveforms at 125 kHz each (yes, I used a 125 MHz parallel DAC, so there was plenty of room to run faster). Until I got everything sorted, there were cases where the processor execution would not keep up, and that's because the DMA was blocked by the CPU (or the other way around).

I wish more designs were built around DSP chips instead of general purpose CPU chips, because there really is a lot of hardware in a DSP that is geared towards streaming signals for high speed processing.

Brian