[sdiy] DSPIC branches GOTOs etc,
Richie Burnett
rburnett at richieburnett.co.uk
Fri Feb 26 00:01:06 CET 2016
Thinking about this some more, since GOTO instructions take up two
consecutive program memory locations, then this code snippet shouldn't
work...
dma_wait:
BTSS IFS0,#DMA1IF ; Check DMA1 transfer complete flag and skip next
instruction if it is set
GOTO dma_wait ; Loop back and wait until DMA transfer is complete
if flag is still clear
<code here to deal with DMA data>
The BTSS or BTSC followed by GOTO appears throughout my code and works fine,
even though the bit-test instruction only skips *one* program memory
location if the tested condition is true. The only reason it must work is
because the second word of the GOTO instruction (the address) is executed as
a NOP. I guess I should go through my program changing all the GOTOs that
follow BTSS or BTSC with BRA instructions instead, just in case Microchip
alter this behaviour in future!?
It's also interesting to note that a CALL instruction to an address label is
also coded as two words of program memory. So using BTSS or BTSC to
conditionally jump over a subroutine CALL would also appear to be on shaky
ground!
-Richie,
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