[sdiy] 1v /oct with ADC question
Michael E Caloroso
mec.forumreader at gmail.com
Fri Dec 2 06:41:14 CET 2016
The Moog Source has no ADC.
The keyboard is analog, but the system is using a comparator with the
keyboard CV at one input and a successive approximation voltage
generated from the DAC at the other input to derive the key note. The
comparator output is simply a logic input to the CPU.
That's how Moog got away without using an $$$ ADC.
On 12/1/16, Tony K <weplar at gmail.com> wrote:
> Have a look at the Moog Source keyboard circuit. As far as I am aware it is
> the only analog keyboard to ADC to DAC again. I love that synth.
> Tony K
>> On Dec 1, 2016, at 1:46 PM, Mike HEQX <mike at heqx.com> wrote:
>> This makes a lot of sense. Never thought of using a DAC after the ADC to
>> generate the CV.
>> I would never have been able to make it work otherwise. So now I know for
>> the next time.
>> I can't wait to make it play notes for the first time.
>> Thanks to all who responded. Everyone had a different view, and all were
>> very valuable.
>>> On 12/1/2016 6:51 AM, Tom Wiltshire wrote:
>>>> On 30 Nov 2016, at 22:24, Mike HEQX <mike at heqx.com> wrote:
>>>> Yeah, it's more like a player piano so I really only need 61 actual
>>>> binary values. I also need the CV out and it just seems so convenient to
>>>> pick that off of the pot.
>>> If you do that, the CV output is continuous, but the note value is
>>> discrete. That's likely to mean that the CV output is a semitone out wrt
>>> the note value, since you're unlikely to have got the pot in a "perfectly
>>> tuned" position.
>>> Better would be to use the ADC to read the pot, and then output the note
>>> value to a DAC. That way, the CV value follows the note value. It might
>>> seem so convenient to use the pot as a CV directly, but it throws up as
>>> many problems as it solves, and for the cost of one DAC, it isn't worth
>>> the saving.
>>>> It looks like the CV will have to generate 64 values at full scale, but
>>>> there will be 3 extra notes on the binary side. That's not ideal in this
>>> Another advantage of doing it this way is that having a few extra values
>>> at the top is no problem. You can stick a resistor above the pot to limit
>>> the input voltage to give you only 61 of your 64 values and the top three
>>> values will simply be unused. The ADC won't read them, and the DAC won't
>>> produce them.
>>> I dealt with some of these problems when designing my VCDO PIC
>>> oscillator. It too uses an ADC to capture an incoming CV and turn it into
>>> a note number. Since I wanted to be able to capture rapidly changing CVs,
>>> I wasn't able to put enough filtering on the incoming values, and
>>> skipping between notes was a problem.
>>> I used the 8-bit ADC on the PIC, and discarded the bottom two bits. It
>>> works fine, but it needs some careful tuning. For your application, I'd
>>> heavily filter the incoming values from the ADC using a shift-based IIR
>>> filter. Then you could reduce them to 6 bits without so many jitter
>>> problems, although you'll still need some sort of hysteresis in this
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