[sdiy] Digital delay memory

Eric Brombaugh ebrombaugh1 at cox.net
Thu Apr 28 03:27:22 CEST 2016


On 04/27/2016 06:00 PM, rsdio at audiobanshee.com wrote:
>
> By the way, I'm working on hardware that uses the FMC for both 24-bit SRAM and 16-bit SDRAM. The problem is that copying 32-bit data from SDRAM to SRAM ends up causing data errors when both external memory modes are used in rapid alternating accesses. The errata explains most of this, and the remaining issues might be all data hold time rather than FMC errors.
>
> In any event, my next ARM will not be STM32F. I hope to use something else without the long errata list or backlog of buggy inventory.

Wow - thanks for the update. Sorry to hear about the troubles you've 
had. I have used the FSMC and FMC peripherals on the STM32F4xx parts and 
never seen anything like that, but I will admit that my use-cases are 
pretty simple - just one device of one memory type hanging off the bus 
with no complex arbitration required.

I had some issues with early silicon on the STM32F373. We were working 
with some of the first devices to come out of distribution and the 
system flash area which normally holds the bootloader had been 
programmed with the bootloader for a completely different device. The 
F373 was supposed to support USB DFU but refused to do so - a couple of 
us got together and managed to dump the system flash area and confirm 
that it never accessed the USB peripheral. A few months later an erratum 
appeared mentioning this and some updated lot-date codes were available 
from distribution which performed as promised.

It's worth remembering that the MCUs we're working with here are 
incredibly complex. For a few dollars we're getting devices that are 
significantly more capable than entire computers that were being sold 
just a short time ago. Ensuring that everything on them works as 
specified is a monumental job and some of the mfgs out there do a much 
better job of it than others.

Eric



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