[sdiy] New SID Chips?
gordonjcp at gjcp.net
Fri Apr 22 21:51:54 CEST 2016
On Fri, Apr 22, 2016 at 12:27:41PM -0700, rsdio at audiobanshee.com wrote:
> Unfortunately, it's not possible to do the whole thing in an FPGA. The SID is a mixed-signal design, with filters and envelopes in the analog domain. There are new chips that combine analog design elements, but AMS (Analog Mixed Signal) is hardly common for FPGA. Another term is FPAA (Field Programmable Analog Array), but the SID requires both digital and analog.
Well, the envelopes are really digitally generated and the filter is implemented like the EDP Wasp filter by using CMOS logic gates in a linear region. So you couldn't quite do that on an FPGA but there's no reason why you couldn't make a "new" version using existing CMOS processes.
If you were doing it on an FPGA you'd just implement a digital filter, which would sound better anyway.
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