[sdiy] Eagle footprints
Tom Bugs
admin at bugbrand.co.uk
Fri Nov 20 21:44:57 CET 2015
You could specify in the CAM processor to have TDocu included in the
silkscreen layer if you wanted.
(each export part has a selectable list of layers to include)
But, checking now, I see I don't have that selected in my standard
gerber export process, so I guess I must have changed any TDocu data
into TPlace or TNames sometime in the past.
Tom
On 20/11/2015 20:12, Richie Burnett wrote:
> A question for the Cadsoft Eagle gurus...
>
> Just finishing off a PCB here with Eagle and noticed that all of the
> SOIC devices have no component outlines or orientation markings on the
> silkscreen layer, only tDocu which can be printed off as documentation
> to aid in assembly but doesn't end up in the silkscreen Gerber file.
> All other semi packages used on this board like TSSOP, TQFP, SOT23
> etc, have at least partial outlines and orientation markings on the
> silkscreen layer, often with more extensive detail on the tDocu
> layer. I'm happy with these.
>
> Is there some reason for this? Did Cadsoft just forget to put
> orientation markings in the SOIC package footprints in their
> libraries, or is there some rule of PCB design somewhere that says
> there shouldn't be silkscreen ink under SOIC devices? Does it
> interfere with the correct seating of SOIC packages during reflow, or
> can I just add silkscreen orientation marks under the device body to
> the footprints that I'm using to aid? I can understand not putting
> silkscreen orientation marks under QFNs that are planar on the bottom
> and pretty much have to be put on by machine anyway, but some
> orientation marks on SOIC's would really help with manual placement.
>
> I realise that any marking underneath the ICs will be covered after
> fitting and make checking device orientation difficult, but I'd rather
> not put orientation marks outside the perimeter of the part as
> component packing density is very high!
>
> I'm interested to hear any thoughts on this,
>
> -Richie,
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