[sdiy] Eagle footprints
Stewart Pye
stewpye at optusnet.com.au
Fri Nov 20 21:25:15 CET 2015
Hi Ritchie,
I don't use Eagle, but I can't see any reason why you couldn't have an
outline within the boundary of the package on the silkscreen layer. I
avoid having the silkscreen layer going over solder areas, but it sounds
like you're not going to do that anyway. Just edit the component to add
the outline you want.
Regards,
Stewart.
On 11/21/2015 6:12 AM, Richie Burnett wrote:
> A question for the Cadsoft Eagle gurus...
>
> Just finishing off a PCB here with Eagle and noticed that all of the
> SOIC devices have no component outlines or orientation markings on the
> silkscreen layer, only tDocu which can be printed off as documentation
> to aid in assembly but doesn't end up in the silkscreen Gerber file.
> All other semi packages used on this board like TSSOP, TQFP, SOT23
> etc, have at least partial outlines and orientation markings on the
> silkscreen layer, often with more extensive detail on the tDocu
> layer. I'm happy with these.
>
> Is there some reason for this? Did Cadsoft just forget to put
> orientation markings in the SOIC package footprints in their
> libraries, or is there some rule of PCB design somewhere that says
> there shouldn't be silkscreen ink under SOIC devices? Does it
> interfere with the correct seating of SOIC packages during reflow, or
> can I just add silkscreen orientation marks under the device body to
> the footprints that I'm using to aid? I can understand not putting
> silkscreen orientation marks under QFNs that are planar on the bottom
> and pretty much have to be put on by machine anyway, but some
> orientation marks on SOIC's would really help with manual placement.
>
> I realise that any marking underneath the ICs will be covered after
> fitting and make checking device orientation difficult, but I'd rather
> not put orientation marks outside the perimeter of the part as
> component packing density is very high!
>
> I'm interested to hear any thoughts on this,
>
> -Richie,
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