[sdiy] Eagle footprints

Neil Johnson neil.johnson71 at gmail.com
Mon Nov 23 12:14:23 CET 2015

Hi Brian,

> One thing that I've noticed is that there doesn't seem to be a definitive landing pattern for surface mount devices. The impression that I get is that it's highly dependent upon the particular fabrication process, the particular stencil thickness, and the particular assembly house process. Although I want to look to the manufacturer to provide a definitive SMD package layout for their parts, it doesn't seem to be 100% reliable.

There are standards - IPC for example - are a good place to start
from.  This extends to pad naming conventions too, so you see names
like "RX10Y20D5" to describe pads in a generic way.  For SMT you can
get bogged down in details:


> For example, a thicker solder resist layer might interfere with placement of small parts, as the resist extends over the copper in some places. This is more of an issue with thicker Cu than with thinner. Also, a thick or thin stencil will affect the amount of solder paste, and thus the appropriate size for the stencil openings. I also imagine that different formulations of solder paste may require slightly different stencil design.

Ideally this shouldn't be an issue - manufacturers want their lines to
be as consistent as possible to minimise the amount of faff in setting
up a line.  Especially in high-volume consumer goods, especially

> My point is that it seems a given library is only really 100% appropriate for a particular manufacturing chain, so the library that works for me might not work for someone else, particularly if a different fab house, stencil shop, and assembler are used.

It's worse than that - the rules can change depending on what the
circuit needs to do.  It is not uncommon to have to tweak footprints
to meet specific design challenges, although ideally this would not be
needed.  It's gotten worse as circuit frequencies have risen, so now
digital circuits are really RF circuits, needing careful impedance
matching and line termination and so on, for example SDRAM, HDMI,
LVDS, etc.

> This is probably less of an issue for pure through-hole designs, which I assume are less picky than surface mount assembly.

I don't think they are less picky, just picky in different ways.


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