[sdiy] G SSL clone RMS conversion

[Neil Johnson]

 Mattias Rickardsson wrote:
>> http://www.gyraf.dk/gy_pd/ssl/ssl_sch.gif
> No RMS, as mentioned already by others.

Correct.

>> I also can't quite work out how the R pairs are arranged around the SW1/Ratio (following the two HWRs).
>
> They are a bit tricky. The diode there also makes the rectifier react
> differently to positive and negative signals, which I don't really
> understand the point of.

Note that there are some errors in that schematic, and it is not drawn
in a particularly learner-friendly way.  So it takes a bit of study to
pick it apart.  I did that a few years ago and now have several
LTSpice versions for experimenting with different compression ratios,
knees, etc.

If you look at the sidechain path, you have the sidechain VCA followed
by its I-to-V converter.  This then feeds a full-wave rectifier, that
then feeds into the ratio function generator (Remember the thread last
year about a book on analogue computers?  Get it, or something
similar, as what we have here is a classic function generator).  The
signal level first has to reach a certain threshold voltage before the
control output starts to change.  The resistors around the switch then
set the gain (or slope) of the output vs input.  This sets the ratio.
On the 1:2 ratio setting we also have a diode to bend the curve to
give a knee.  Then we move onto the attack/release switches.  Familiar
stuff if you've ever looked at a simple envelope generator.  After
that is a buffer, which feeds (a) the meter, (b) the main VCA feed
with "MakeUp" offset, and (c0 the sidechain VCA with "Threshold" gain
offset.

> Possibly some error in the simulation? I simulated it once in LTspice,
> even built it with 2164s, and in both worlds it behaved well!

Me too.  I've been experimenting with different sidechain filters,
compression ratios, and various other ideas.

Neil
--
http://www.njohnson.co.uk