[sdiy] Digital modular backplane - update

cheater00 . cheater00 at gmail.com
Mon Mar 17 12:24:20 CET 2014

Hi guys,
Some time ago we have spoken about what it would take to make a
digital backplane for a modular synth. One of the issues was that most
common digital interconnects will introduce large delays in
transporting the audio which are not acceptable in modular synthesis.
A requirement was mentioned of ideally having the delay as low as the
transmission time of 1 bit. This has to take into account the
situation that an ADC or DAC will operate at low clock speeds, while
the backplane would operate at very high clock rates, in order to
accomodate many ADC-DAC links in the switched, TDM fabric.

I have come across the idea of using a SerDes:


They are basically shift registers with additional ISO OSI Layer 1
processing. in specific, it seems a popular type uses 8b/10b encoding
which limits the RFI impact, and makes the layout much easier as the
lower bandwidth limit of the physical links goes further up, while the
upper bandwidth limit doesn't move.

In addition this device family addresses the issue of having slow
links on fast backplanes:

"Bit interleaved SerDes multiplexes several slower serial data streams
into faster serial streams, and the receiver demultiplexes the faster
bit streams back to slower streams."

It seems in this case there is no bunching or buffering so the latency
can be kept to a minimum.

Silicon for SerDes applications exists and is popularly used in loads
of consumer technologies:

"Among the areas in which 8b/10b encoding finds application are the following:

PCI Express at speeds below 8.0 GT/s
IEEE 1394b
Serial ATA
Fibre Channel
Gigabit Ethernet (except for the twisted pair based 1000Base-T)
Serial RapidIO
DVB Asynchronous Serial Interface (ASI)
DisplayPort Main Link
DVI and HDMI Video Island (transition-minimized differential signaling)
Common Public Radio Interface (CPRI)
OBSAI RP3 interface
USB 3.0
ServerNet (From ServerNet2 onward)"

It might be possible to find switched fabric chips that can route the
links on an X/Y grid for best bandwidth utilization, and which can do
so without buffering. At least that is what I would expect of what
Infiniband, Gb Ethernet, and Fibre Channel are doing.


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