[sdiy] [synth-diy] numerically controlled superoscillator without hard sync

[Roman Sowa]

 >
 > When I said the ADC would be missing codes, that means something else
 > than "code executing on the ADC". Codes in an ADC are nomenclature
 > from signal theory. Missed codes mean that the ADC is not outputting
 > some values it should be outputting.

I know what missing code is. The only ones missing would be at the edges 
of ramp. But there is no ADC in my proposal, so we're just missing a few 
clocks while the ramp gets smaller at higher frequency

 >
 >> it does not. Of course there will be nonlinearities, but in rather 
constant
 >> and predictible manner, so the tuning can be compensated as it is with
 >> resistor inserted in series with integrating cap in most common 
triangle VCO
 >> core.
 >
 > That's not a non-linearity - that's an amount of time in the real
 > world during which the time was frozen for the variable sample rate

or in another words time nonlinearity, or I should actually call it - 
frequency modulation with modulator's frequency equal to base VCO ramp 
frequency.

 > system. It means incorrect reading of the signal and, in the end,
 > actually aliasing. Why aliasing? The situation I described above is
 > similar to if you took a recording of a VCO at a constant pitch, and
 > randomly, now and then, duplicated a run of a few samples. That's not
 > great.

this will just create slight frequency modulation at the edges of 
reproduced waveform, and I expect that with higher frequency number of 
clock pulses will drop, either because base sawtooth gets smaller and 
that pulse circuit will not be fast enough. But that's (hopefully) 
linear dependency and can be compensated.

 >>
 >> I'll shut up if I see good tracking VCO with 10-octave usable range 
going up
 >> to, let's say, 50Mhz.
 >
 > I can't talk for that. I did describe a DCO though. Those are much
 > easier to control. You just need a good reference clock (and that can
 > be had inexpensively). See the post from December. This thread is a
 > discussion of that DCO's applications.

I don't have that post any more. But if the sample clock is derived from 
DCO, then this whole part of discussion is poitless.


 >
 > The barber-pole arrangement can be performed because the original
 > frequency is very high. So you have to divide it a few times. If you
 > want to change which Riemann sheet you're on, you just change the
 > division ratio by two. You signal the current division ratio to the
 > uC, so that it knows what mip-map to caluclate.
 >

despite your elaborate description I don't completely get it.
Anyway, I'd be interested in final results when it turns out as working 
live circuit.

Roman