[sdiy] [synth-diy] numerically controlled superoscillator without hard sync

[cheater00 .]

On Sun, Feb 9, 2014, Roman Sowa <modular at go2.pl> wrote:
> That needs so high frequency VCO, that every typical VCO topologies we know
> would be just useless. You need RF stuff, and that rarely has wider range
> than 2:1, I mean one octave.

First of all, you don't really need one clock cycle per instruction,
just one cycle per sample of output - see what I discussed with Brian.

I have an 80s Phillips analog VCO signal generator on my workbench and
it goes up to 20 MHz. It has deep FM. It cost 50 euro or so. I don't
think what you're saying about the difficulty of fast VCOs is
necessarily true. Check out the original post from December. It
describes a numerically controlled oscillator - I bet it could be made
fairly stable.

> But, if you take VCO saw wave at audio frequency, and add a nifty circuit
> that generates a pulse everytime voltage rises by, say, 20mV, then we get
> about 250 times higher frequency from 5V saw, that can be used as DSP clock.
> And that's entire wave cycle, not much to calculate anything. Say 10
> operations per sample, 25 samples per period. Pretty lo-fi.
> I wouldn't dare to use higher frequency VCO to increase CLK count per output
> wave cycle, because there will be inevitable nonlinearities at the sawtooth
> edges, and that will lead to jumping DSP clock frequency that will be
> audible.

You've described a DAC. I've given this serious thought long before I
came up with the superoscillator idea. The issue with a DAC-based
frequency multiplier is that unless the waveform sampled is exactly
rail to rail, the DAC will miss codes. Any non-linearity will be
easily audible. And on top of that, it doesn't work with FM and hard
sync. What would happen if you were using a triangle core, and you are
at the rising edge. Your waveform reaches 95% peak voltage, then it
turns back and goes back to 92%, then turns back and goes up to 100%
and changes state to the falling edge, and goes back down to 0%. How
should a DAC multiplier recognize that? What about things that happen
within one DAC code? With a 16 bit DAC it might be less important, but
as you say yourself, even an 8 bit DAC is braving it. No, having a
superoscillator and simply counting it is a better idea. With FM, any
changes in FM signal will be much below the carrier frequency of the
SO, and therefore any errors due to waveforms being funny due to
abrupt FM will be minimized. Anything that makes a cycle of the SO
somehow become weird is unimportant - because a single cycle of the SO
is unimportant, as there are so many SO cycles to just one cycle of
the VCO. Therefore we minimize the error by making the SO frequency
higher.

> I did variable rate wavetable synthesis back in the early 90s of last
> century, even not knowing about PPG existence. But anyway, it used 32
> samples per cycle, that could be linked up to 4k of evolving waveform.
> Every sound generated this way was a bit like combo organ sound. No matter
> how you draw the waveform, 32th harmocnic was anoying.
>
> The sound is easy recognizable, and has its character, but was too much
> lo-fi to me. VCF helped a lot and finally it turned out as a nice polysynth,
> although I never wanted to go back to the idea of variable sample rate ever
> again.

Nowadays chips are much more powerful. You can certainly cover the
whole spectrum up to 22 kHz. Especially once the below is answered...

> We also need to consider that constant number of samples leads to
> unnecessary massive amount of calculations and samples at higher end, and
> surely too low sample count at lower frequencies, which requires filtering
> down to very low frequencies. Audio would be very limited if we don't want
> to hear the sampling clock, and IMHO it's not a nice thing to hear on any
> sound.

Easily optimized away by use of mip-mapping.