[sdiy] Retaining button state after power off?

[Phil Harbison]

Roman Sowa wrote:
> I was refering to power cycles of the entire device and not each
> button press, because the clean way to do it is to write last config
> state when power is actually being turned off. PIC monitors power
> line, and if it  drops below some threshold, it initiates EEPROM
> write, which takes about 3ms. [...]

Back in the early 1980's I designed some datacom equipment using an
NVRAM to store setup parameters. I don't recall the manufacturer or
part number but it was essentially a 256x4 static RAM with an EEPROM
cell for each RAM cell. There was a store pin to store all RAM cells
to EEPROM, and a recall pin to recall all EEPROM to RAM. EEPROM in
those days had a write endurance of only about 1000 cycles. To make
the most of this, we had a circuit to detect the absence of zero
crossings on the AC line, and a large enough capacitor on the NVRAM
to hold up power for at least 50 msec. so you could modify the NVRAM
as often as you like and it would use a write cycle if power failed
while there were changes. The part we used was not this Intersil
part but it looks like it automatically writes on power fail. You
might be able to find this or a similar part.

http://www.intersil.com/content/dam/Intersil/documents/fn81/fn8124.pdf
http://www.intersil.com/content/dam/Intersil/documents/an11/an1146.pdf

-- 
Phil Harbison