[sdiy] SSM2164 Phaser - another way?

Tom Wiltshire tom at electricdruid.net
Tue Feb 18 17:05:31 CET 2014


On 18 Feb 2014, at 15:38, Neil Johnson <neil.johnson71 at gmail.com> wrote:

> Hi Tom,
> 
>> I know that phasers with the SSM2164 aren't anything new, but I wondered if anyone had tried this:
>> 
>>        http://www.electricdruid.net/images/SSM2164Phaser.png
>> 
>> It looks ok in the sim. It breaks the usual rules by taking the output of the SSM2164 to a genuine ground rather than a virtual ground, but I can't see why that should be a problem - is it?
> 
> Connecting the 2164 output to ground shouldn't be a problem.  In some
> ways that is the ideal situation.
> 
> What concerns me more is the model of the 2164 you're using in your simulator??

I'm using a simple LTspice model that Olivier Gillet posted in one of the Mutable Instruments forums:

* SSM2164 VCA cell
.SUBCKT SSM2164 IN OUT CV
* The two transistors in the input's differential pair have the same base
* current, hence the same Vbe. The second transistor is referenced to
* ground so IN is virtually grounded.
V1 IN 0 0
* Current gain expression
G1 OUT 0 VALUE={-I(V1)*PWR(10, -V(CV) * 1.5)}
.ENDS

My thanks to Olivier for helping me out with that. It doesn't model the 5K impedance of the CV input, but it works well enough for everything else - and I've tried quite a lot of things with it.

T.



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