[sdiy] Din Sync Master Implementation
Maarten
diy at artefacts.nl
Mon Aug 18 16:56:01 CEST 2014
I don't know if the sync error is also related to the din sync input,
but you might try to lengthen the first clock pulse and find out if this
solves the problem.
Maarten
maxrest at gmx.de schreef op 18-8-2014 16:38:
> Doubling the incoming frequency would probable throw the 909 out of it's
> sync as I do not send symetrical pulses.
>
> But would you agree with me that muting the pulses shouldn't do any harm
> to the machine? I mean they don't implement a PLL or something similar
> that needs to settle and that might mess everything up..
>
>
>
>> If the lag doesn't get any worse from repeating your test sequence
>> then it doesn't sound like you are doing anything wrong or that the
>> TR-909 is missing any of the clock pulses that you are feeding it.
>> Otherwise repeated stop/continue cycles should progressively throw it
>> further out of sync. What you describe with pressing the STOP button
>> on the machine sorting out the problem seems to imply that the machine
>> is occasionally in some erroneous state before you start your test and
>> it is already once clock cycle behind from there onwards.
>>
>> I think I heard somewhere that the TR-909 doubles the MIDI clock
>> frequency coming in, in order to provide finer resolution for the
>> shuffle function. Maybe a similar thing is done to the DINSYNC clock
>> in, or it maybe acts on both edges of the DINSYNC clock to increase
>> the resolution. I don't have any hard reference for this so I'm not
>> sure how it works, but maybe your problem somehow relates to this action.
>>
>> -Richie,
>>
>> On 2014-08-18 14:50, maxrest at gmx.de wrote:
>>> It was behind the master and doesn't accumulate for sure.
>>>
>>> If it is in sync, I can start, stop and continue it for minutes
>>> without any
>>> problems. If it's not, it stays with the same shift. I checked the
>>> signals and signals' count & timing with the logic analyzer, it looks
>>> like intended and described.
>>>
>>> What I observed: when I press STOP on the 909, the next start from my
>>> master get's the machine in sync.
>>>
>>> I found out about the 909 sequencer lag bug [1] but the machine I test
>>> here is already updated. Does anyone know if they only fixed MIDI
>>> synchronisation with it?
>>>
>>> Best,
>>>
>>> Max
>>>
>>>
>>> [1] http://www.diprec.com/tr909/tr909.htm
>>>
>>>> Does the 909 fall behind the master or get ahead? After multiple
>>>> cycles of your test sequence is the error cumulative. I.e. Does it
>>>> fall progressively further behind if you keep repeating the test?
>>>> Might help diagnose what's going on.
>>>>
>>>> -Richie,
>>>>
>>>> Sent from my Xperia SP on O2
>>>>
>>>> ---- maxrest at gmx.de wrote ----
>>>>
>>>>> Hello fellows,
>>>>>
>>>>>
>>>>> at first I'd like to introduce myself: My name is Max and I run a
>>>>> small
>>>>> company called E-RM in Berlin. We make clock generators and other
>>>>> audio
>>>>> related custom projects.
>>>>>
>>>>> I recently came across the task to implement a (Roland) DIN Sync
>>>>> master
>>>>> in a microcontroller and found an old thread in the archives [1]
>>>>> describing some details.
>>>>>
>>>>> My implementation uses asymetrical clock ticks with a positive pulse
>>>>> width of 5ms. There are three knobs to controll the transport, PLAY,
>>>>> STOP/PAUSE and CONTINUE
>>>>>
>>>>>
>>>>> Let's assume we are at the beginning and everything is stopped:
>>>>>
>>>>> Start: Low, no clock Ticks
>>>>>
>>>>> -> press PLAY
>>>>>
>>>>> Start: Low>High -> 10-60ms delay -> Ticks start
>>>>>
>>>>> -> press STOP/PAUSE
>>>>>
>>>>> Start: High, no clock ticks
>>>>>
>>>>> -> press CONTINUE
>>>>>
>>>>> Start: High, Ticks continue
>>>>>
>>>>> -> press STOP/PAUSE
>>>>>
>>>>> Start: High, no clock ticks
>>>>>
>>>>> -> press PLAY
>>>>>
>>>>> Start: High>Low -> 10-60ms delay -> Start: Low>High -> 10-60ms
>>>>> delay ->
>>>>> Ticks start
>>>>>
>>>>>
>>>>>
>>>>> I tested my code with a Roland 606, 707 and 909. 606 and 707 work
>>>>> pefectly fine with that scheme.
>>>>>
>>>>> The 909 doesn't. Every now and then it is shifted by one clock
>>>>> cycle. I
>>>>> do not understand this behaviour as everything I read implies that I
>>>>> have to wait _at least_ 9ms from the rising edge on the Start signal
>>>>> till my first tick. Otherwise it may get lost in CPU preperation time.
>>>>>
>>>>> What does it mean that the 909 doesn't like longer wait times? Does
>>>>> anyone have a clue on this?
>>>>>
>>>>>
>>>>> Best,
>>>>>
>>>>> Max
>>>>>
>>>>>
>>>>> [1] http://dropmix.xs4all.nl/pipermail/synth-diy/2011-May/032373.html
>>>>>
>>>>>
>>>>>
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