[sdiy] Schmitz ADSR replace pots with CV control?

[Tom Wiltshire]

On 26 Nov 2013, at 12:12, cheater00 . <cheater00 at gmail.com> wrote:

> On Tue, Nov 26, 2013 at 1:01 PM, Roman Sowa <modular at go2.pl> wrote:
>> yes, and frankly I thought about making semi-digital envelope recently.

Come over to the dark side, Roman…You know it makes sense...</darthvoice>

>> But:
>> 2. pure logic control exhibits beauty of cleanness and reliability
>> 3. I like it the way it is...
> 
> That's my worry as well. Delays in dedicated logic are orders of
> magnitude lower than delays from microprocessors.

Come come! We're on 125ns instruction cycles here! The interrupt latency on the mid range PICs is usually 3 cycles - 375ns. Perhaps dedicated logic is faster, but no-one is ever going to notice when we're so many orders of magnitude lower than human perception.

Concepts of "elegance" in a design are definitely subjective, but for me, a big spaghetti pile of logic looks complicated and messy. I'd much rather see one chip and a few lines of code - my concept of "elegance" is close to "how few chips can you use?", even to the extent of preferring two op-amps over four. But that's me.

T.