[sdiy] JP8 Gate circuit issue

[Phil Macphail]

On 1 Nov 2013, at 14:28, Jack Jackson <jackdamery at hotmail.co.uk> wrote:

> Thanks, I wasn't aware - too much of a noob. I removed the R127 pullup resistor, as Tom Wiltshire suggested and then it started to output 15v on the collector as expected. 
> 
> With an active-low input, the base should be fed 5v all the time and the gate 'input pulse' would be 0v, is that correct?

Yes that's correct, 5v for gate off, 0v for gate on.

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> ----------------------------------------
>> CC: synth-diy at dropmix.xs4all.nl
>> From: phil.macphail at liivatera.com
>> Subject: Re: [sdiy] JP8 Gate circuit issue
>> Date: Thu, 31 Oct 2013 21:55:12 +0200
>> To: jackdamery at hotmail.co.uk
>> 
>> 
>> 
>>> On 31 Oct 2013, at 21:31, Jack Jackson <jackdamery at hotmail.co.uk> wrote:
>>> 
>>> Hey all, I'm trying to get this gate circuit from the JP8 working. As far as I can tell you should apply 5v logic signal to the base of the transistor and it should output 15v positive gate. I can't get any change from it. I'm using correct resistor values, and a 2N3904 for the NPN. Any ideas?
>>> 
>>> http://flic.kr/p/h9o13k
>> 
>> Can you drive the input with a switch (0 & 5volts), and measure the output with a multimeter?
>> It's stating the obvious but you realise that the circuit is an inverter, so for a 15volt output pulse you need an active-low input pulse?
>>> 
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