[sdiy] Static ADC and DAC recommendations?

[Paul Anderson]

Basically, a Zener diode conducts when the reverse voltage exceeds a rated threshold. One type of voltage regulation uses a Zener controlling a transistor. 

Say we have a one bit converter. It is designed to accept 0-10v as an input signal, and we want 5v and up to represent a one. We use a 5v rated Zener connected to the base of a transistor. When the signal passes five volts, the Zener begins to conduct and turns the transistor on. 

We add another bit by adding another Zener and transistor, and so forth. So you end up with a series of transistors that will go from cutoff to saturation in order as the voltage increases. You then need some logic gates to turn it into proper binary. 

--------
Paul Anderson -- VE3HOP

On 2013-01-27, at 4:05 AM, cheater cheater <cheater00 at gmail.com> wrote:

> Hi Paul,
> thanks a lot for your replies, that's very creative. I'll answer all
> in a single email.
> 
> On Sun, Jan 27, 2013 at 8:00 AM, Paul Anderson <wackyvorlon at me.com> wrote:
>> Alright here's my wacky idea for a circuit:
>> 
>> Signal goes to an op-amp, then into a series of parallel Zener diodes connected to the base of several transistors. The values of the zeners have to be chosen to conduct at sensible voltages for each of the possible output values. The transistors then feed into an appropriate logic gate setup to make sure that the right values appear.
>> 
>> It should work, but bear in mind *it will work very badly*.  No clock means that the output values will change while they are being read, which can lead to weirdness. Further, the number of diodes and transistors required goes up exponentially with the number of bits, so it's only feasible to build a very low bit converter. Eight bits of resolution means you'd need 256 diodes and transistors driving the logic gates.
> 
> Hmm, how does this work? Can you explain on the example of a 1-bit
> converter that uses this technique? And then compare to 2-bit? I've
> never seen an A/D converter use  Zener diodes.
> 
> Do you think this could be used in a pipeline architecture?
> 
> On Sun, Jan 27, 2013 at 8:05 AM, Paul Anderson <wackyvorlon at me.com> wrote:
>> 
>> On 2013-01-17, at 6:11 PM, cheater cheater <cheater00 at gmail.com> wrote:
>>> Dual-slope is also different: it involves a voltage reference and a
>>> timing circuit (usually based off a clock and counter) and some
>>> arithmetic logic.
>> 
>> Maybe drive the 555 with the signal, and use the PWM output it produces?
> 
> Sure, you can do that, just saying dual-slope isn't exactly what I
> want because it's again some form of discrete-time conversion and/or
> discrete-time logic.
> 
> On Sun, Jan 27, 2013 at 8:11 AM, Paul Anderson <wackyvorlon at me.com> wrote:
>> Alright, I did some searching for stuff on asynchronous ADCs. I'm not aware
>> of any parts being manufactured, but I found this PDF which may prove
>> helpful:
>> 
>> http://cdn.intechopen.com/pdfs/10825/InTech-Asynchronous_analogue_to_digital_conversion_techniques.pdf
> 
> I've spent days googling around and never ran into this thing. Looks
> super-interesting, thanks. I'll read it and report back if I find
> something out.
> 
>> If you want glitchy, why not try clocking an ADC randomly using a noise
>> source?
> 
> That would be a different kind of glitchy :) It's like Sallen-key vs
> Moog ladder for the ADC connoisseur... ;)
> 
> Thanks,
> D.
> 
>> On 2013-01-17, at 10:56 AM, cheater cheater <cheater00 at gmail.com> wrote:
>> 
>>> Hi guys,
>>> I'm looking for a clock-less ADC which will output an 8-wire parallel
>>> bus of continuous signals. My initial thought was to implement a
>>> simple ADC with comparators, but I'm sure there has to be a chip like
>>> that as well. I have been unable to find anything like that, though.
>>> 
>>> On the DAC front, the idea is to use an r2r DAC, and turn the parallel
>>> signal back to a normal analog signal. The DAC0800 is one option, but
>>> I'm sure there are others, so feel free to suggest anything.
>>> 
>>> The idea here is to have a box which has an ADC the signal of which
>>> goes straight into a DAC. The two should work without a clock (so you
>>> can e.g. use it in feedback paths), and so that you can process the
>>> separate "bits" just like any other analog signal and see how the DAC
>>> racts to that. Additionally, being able to glitch out the ADC with
>>> too-fast signals is a plus.
>>> 
>>> Perhaps being able to limit the current to the ADC section or even the
>>> various comparators, you could get things like cross-over distortion
>>> to become more prominent.
>>> 
>>> It should be interesting to see how the signal degrades when the ADC's
>>> region of normal operation is exited - it shouldn't be aliasing
>>> anymore.
>>> 
>>> Thanks
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