[sdiy] Static ADC and DAC recommendations?
cheater cheater
cheater00 at gmail.com
Thu Jan 17 23:11:43 CET 2013
Wait a sec guys - I thought the usual approach was folding converters.
That is, you take the input signal, scale it to e.g. 0-1V, and see if
it's the upper or lower half (so if it's positive then negative). You
call that the msb, deduce 0.5V*logical value from the original signal,
and you get something ranges from 0 to 0.5V. Then you scale that up
twice to get a range 0-1V again, and repeat the whole process, getting
the second bit, and so on. Only 8 comparators here, and, eh, how many
transistors? I don't know off the top of my head. Why would that be so
expensive to make in silicon?
> If you do want a clockless converter, John Simonton wrote an article in a long past polyphony on how to do this with LM339's However while one LM339 will give you a 4 bit converter
I believe that's exactly what he's doing. I looked at doing this sort
of thing with an LM339, but I just can't believe there isn't a chip
out there that does this in integrated form. It seems like a
no-brainer. I hope someone has a lead on that.. I *would* expect this
sort of thing to be viewed as an anachronism nowadays, though, and
probably limited to NOS or small-yield production runs.
Cheers
On Thu, Jan 17, 2013 at 7:45 PM, Jim Patchell <patchell at cox.net> wrote:
> No Clocks and ADC are pretty much contradictory terms. If you clock fast
> enough, the delay you get will be insignificant for use in a feed back loop.
>
> If you do want a clockless converter, John Simonton wrote an article in a
> long past polyphony on how to do this with LM339's However while one LM339
> will give you a 4 bit converter, the number of parts you will need really
> skyrockets for more bits. And even if you do make say an 8 bit converter,
> you are going to experience some rather nasty transients as the conveter
> trys to settle down and you are probably going to see some nasty banging
> around in the LSBs.
>
> -Jim
>
>
> On 1/17/2013 7:56 AM, cheater cheater wrote:
>>
>> Hi guys,
>> I'm looking for a clock-less ADC which will output an 8-wire parallel
>> bus of continuous signals. My initial thought was to implement a
>> simple ADC with comparators, but I'm sure there has to be a chip like
>> that as well. I have been unable to find anything like that, though.
>>
>> On the DAC front, the idea is to use an r2r DAC, and turn the parallel
>> signal back to a normal analog signal. The DAC0800 is one option, but
>> I'm sure there are others, so feel free to suggest anything.
>>
>> The idea here is to have a box which has an ADC the signal of which
>> goes straight into a DAC. The two should work without a clock (so you
>> can e.g. use it in feedback paths), and so that you can process the
>> separate "bits" just like any other analog signal and see how the DAC
>> racts to that. Additionally, being able to glitch out the ADC with
>> too-fast signals is a plus.
>>
>> Perhaps being able to limit the current to the ADC section or even the
>> various comparators, you could get things like cross-over distortion
>> to become more prominent.
>>
>> It should be interesting to see how the signal degrades when the ADC's
>> region of normal operation is exited - it shouldn't be aliasing
>> anymore.
>>
>> Thanks
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