[sdiy] Logic Gate help (Help!)

Justin Owen juzowen at gmail.com
Wed Jan 23 17:26:11 CET 2013


I'm looking to build a 2x input OR Gate and a 3x input XOR Gate using Resistor/(NPN)Transistor Logic.

I have this schem of a 3x Input NOR: http://en.wikipedia.org/wiki/File:RTL_3-Input_NOR_Gate.svg

1) From that schem, if I remove 1x Input and either Invert the output or take the Q Output from the joined Emitters - does that give me a 2x Input OR?

2) Is a 3x Input NOR the same as an XNOR? i.e. If I invert the output of that schem I get a 3x Input XOR from that XNOR? The truth tables suggests not - but I'm asking anyway.

If not! Anyone got any pointers to a 2x In OR and a 3x In XOR using RTL?



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