[sdiy] Parallel 8 Bit DACS?

[rsdio at sounds.wa.com]

On Dec 9, 2013, at 00:34, cheater00 . wrote:
> On 9 Dec 2013 00:14, <rsdio at sounds.wa.com> wrote:
> > The Texas Instruments THS5671A 14-bit DAC runs at 125 MHz, and  
> has both +/- outputs. They're
>
> > current outputs, so you'll probably need current-to-voltage  
> conversion. As with any parallel input DAC,
>
> > you'll want S/H on the output to de-glitch.
>
> I believe if there's no S&H on the output then it's a charge output  
> rather than current, right?
>
>

Not sure that I understand what you're trying to ask here. There is  
only voltage and current. Charge is not a distinct circuit concept  
from current.

The S&H would come after the current-to-voltage conversion, by the  
way. You only need one C2V, then you can have as many S/H as you need  
for multiple channels.

If there's no S&H on the output, then you get a glitch in whatever  
output the DAC is producing. A current-output DAC will have a glitch  
in the current; a voltage-output DAC will have a glitch in the voltage.



> > I'd recommend the following:
> >
> > Oscillator -> Binary counter -> EPROM -> DAC -> S/H
> >
> > ... with appropriate logic to tie the S/H timing to the  
> oscillator to keep everything in sync.
>
> There doesn't seem to be any logic necessary - I guess one  
> oscillator cycle progresses the sample, so you will want to recover  
> an edge from that. The question is what the gate delays are from  
> the oscillator to the charge output. You don't want to trigger the  
> S&H directly off the oscillator, that'll be too soon. You might  
> want to delay it with an RC filter. For this purpose it's a better  
> idea to start with a sinewave oscillator, and then separately  
> recover an edge before going to the counter, and after the delay  
> before going to the S&H.
>
>

The logic that is necessary is to account for the fact that you don't  
necessarily want to trigger the S&H directly off the oscillator.  
Sample-and-Hold is really Track-and-Hold, so sometimes you don't  
really want the S/H tracking the input for too long - just long  
enough to get an accurate voltage. Then you'd want a control signal  
for the S/H that doesn't have a 50% duty cycle.

You definitely don't want a sine wave oscillator. Every issue you've  
raised can be solved with the appropriate logic gate circuits.



> What about using an FRAM? It seems Peter Ullrich has had good  
> experience with them. RS Online has parallel chips in stock, both 8  
> bit and 16 bit. They're limited to 128/256 k words, but that's like  
> 12 to 25 seconds. Cost starts at 15 quid though.
>
>

FRAM is fine, so long as it has a parallel address+data bus. But then  
we're back to the same problem of how to program the FRAM chip. It's  
not going to be any easier than Flash, but the thing might run on  
battery power for longer. I have a hunch that FRAM will be too  
expensive unless you need to pay for low power performance.

Brian Willoughby

Sound Consulting