[sdiy] [FWD: RE: PCB digital signal layout question]
grant at musictechnologiesgroup.com
grant at musictechnologiesgroup.com
Fri Aug 2 22:10:59 CEST 2013
Thanks for the helpful info. The speed is even slower than that. It's
the actual drum machine sound ROMs I'm working with, so more like 20 or
30 kHz, but it's multiplexed sounds (for lack of a better term ... more
like the single-DAC Drumulator and less like the multiple-DAC
Linn/OB/etc) so it is probably accessed much faster. At some point early
on I'll put the target device on the scope and double check. I can think
of a few machines that use code space for the sound data (360 MidiBass
for example), so that one is about 1 MHz.
Yeah I'm not sure if the ribbon cable or socket-with-long-pins is best,
but I don't have a lot of vertical room. Plus I don't like sticking pins
into a chip socket that are dramatically different than chip pins. My
pet peeve is the E! expansion that uses fat square 0.1" headers. Might
as well be shoving wire-wrap pins in there. You're practically buggering
the original socket. ;-)
GB
-------- Original Message --------
Subject: Re: [sdiy] PCB digital signal layout question
From: rburnett at richieburnett.co.uk
Date: Fri, August 02, 2013 11:21 am
To: <synth-diy at dropmix.xs4all.nl>
Hi,
You haven't said what speed this is all being clocked at but I'll
assume somewhere in the low MHz. The most important things are keeping
the connections short, and minimising loops! In other words short
busses of all the lines routed in parallel are good. Conversely,
routing every data or address line via a different route is bad because
that encloses area adding inductance. Taking radically different routes
for different lines can also result in signals arriving at different
times in the extreme case.
The "stacking EPROMS on top of each other" method is actually the most
sure-fire way of getting it to work. The address and data busses are as
short as they can be, and they are routed neatly in parallel. You can't
do much better than this! However, if you put it on a PCB i'd just
weave the data and address lines between the 0.1" spaced pins of the
chips like in that example you posted. I'd also include 100nF ceramic
decoupling caps next to each EPROM to support local current demand as
these chips are addressed.
From the information you gave, i'd be most concerned about the ribbon
cable you mentioned! This is where any problems are likely to happen.
If this ribbon is longer than a few centimeters you will get signal
reflections from the ends of the cable and this can potentially mess up
high-speed logic signals traversing the cable. If the cable has to be
long, then i'd set every alternate wire in the ribbon to be a ground
wire like they do in IDE (PATA) ribbon cables in PCs. It works very
well at reducing crosstalk and reflections.
-Richie,
On 2013-08-02 18:50, grant at musictechnologiesgroup.com wrote:
> So I'm embarking on a simple EPROM memory expansion for some drum
> machines ... you know kind of like the ones where they stack a bunch
> of
> memory chips on top of each other and solder all the pins together
> except Chip Enable...
>
> http://www.wilsonminesco.com/6502primer/SRAMstack3.jpg
> or
> http://www.wilsonminesco.com/6502primer/SRAMstack5.jpg
>
> Except mine is for EPROMs and I'm laying out a PCB, not stacking.
Kind
> of like this,
>
> http://www.machineinteltech.com/images/PCB01sm.JPG
> or
> http://www.hylander.com/miniwavethumbs.html
>
> There are several pins like VPP and unused Chip Selects that are tied
> to
> VCC and GND on the EPROM memory chip in the unmodified instrument. On
> the additional EPROMs they would also be tied this way. I'm removing
> the
> original EPROM and using a ribbon cable to relocate it onto my memory
> expansion board. For those lines mentioned, I can just run traces
from
> one chip to the next in pretty row -or- I can actually pull then to
> nice
> fat bus lines running elsewhere on the PCB I'm making. Do you think
> there is a preference?
>
> If just run them in pretty rows-chip-to-chip it's OK, but I don't
have
> as nice an option of putting a bypass cap there. If I take the
> original
> signals and run them up to bus lines outside the land pattern of the
> EPROMs, the I can add the bypass caps -or- really I could do both,
but
> I
> suppose that would add small ground loops. Just wondering if anyone
> has
> done this before?
>
> GB
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