[sdiy] PCB digital signal layout question

[grant at musictechnologiesgroup.com]

So I'm embarking on a simple EPROM memory expansion for some drum
machines ... you know kind of like the ones where they stack a bunch of
memory chips on top of each other and solder all the pins together
except Chip Enable...  

http://www.wilsonminesco.com/6502primer/SRAMstack3.jpg
or
http://www.wilsonminesco.com/6502primer/SRAMstack5.jpg

Except mine is for EPROMs and I'm laying out a PCB, not stacking. Kind
of like this,

http://www.machineinteltech.com/images/PCB01sm.JPG
or
http://www.hylander.com/miniwavethumbs.html

There are several pins like VPP and unused Chip Selects that are tied to
VCC and GND on the EPROM memory chip in the unmodified instrument. On
the additional EPROMs they would also be tied this way. I'm removing the
original EPROM and using a ribbon cable to relocate it onto my memory
expansion board. For those lines mentioned, I can just run traces from
one chip to the next in pretty row -or- I can actually pull then to nice
fat bus lines running elsewhere on the PCB I'm making. Do you think
there is a preference?  

If just run them in pretty rows-chip-to-chip it's OK, but I don't have
as nice an option of putting a bypass cap there. If I take the original
signals and run them up to bus lines outside the land pattern of the
EPROMs, the I can add the bypass caps -or- really I could do both, but I
suppose that would add small ground loops. Just wondering if anyone has
done this before?

GB