[sdiy] cs4344 DAC output stage
James J. Clark
clark at cim.mcgill.ca
Thu Sep 20 18:38:28 CEST 2012
On Thu, 20 Sep 2012, Richie Burnett wrote:
>> ......One small nitpick is that it is limited to 16 bits when running at 96
>> or 192KHz with a 128x or 256x OSR (e.g. with a master clock of 24.576MHz).
>
> Hi Jim,
>
> Why does it have to be limited to only 16-bit data for those clock
>ratios? Is it something to do with the I2S format specifically? or the
>DAC itself?
It's just a matter of math. It seems that the ratio of the MCLK frequency
to the SCLK (bit clock) must be a power of 2. So for an OSR (MCLK rate
over the LRCLK rate) that is a power of 2 the ratio of SCLK to LRCLK must
also be a power of 2 (e.g 32 which only allows 32 bits to be packed in).
Note that although one is only reading in 16 bits in this mode, the DAC is
still a 24-bit DAC, and the word is extended by setting the 8 LSBs to 0.
So the noise level is that of a 24-bit DAC, but the data is truncated to
16 bits slightly increasing quantization error noise. For an oscillator
the signal is usually full-range without too many small signal variations,
so you don't really notice a drop from 24 to 16 bits resolution.
>
> I ask because I have a product in the development phase that currently uses
> the CS4335 with 24-bit data. However, this left-justified version of the
> CS433x family has just been discontinued and I suspect the rest of these
> "large" SOIC-8 variants will follow, so I was thinking of migrating to the
> CS4345 part.
>
> I've never understood the logic behind delaying the audio data by one bit in
> the I2S format, and this quirk can cause problems with some micros/DSPs. For
> that reason i've tended to stick with left-justified data and had no
> problems, but it seems that I2S format gives you a wider choice of CODECs.
>From the Philips spec:
"The WS line changes one clock period before the MSB is transmitted. This
allows the slave transmitter to derive synchronous timing of the serial
data that will be set up for transmission. Furthermore, it enables the
receiver to store the previous word and clear the input for the next
word..."
Hope this clarifies things somewhat!
Jim
>
> -Richie,
>
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