[sdiy] 1 bit serial stream delay approaches..

[Scott Gravenhorst]

jpdesroc at oricom.ca wrote:
>Thanks,
>The problem with this type of one-shot is that
>it will 'ignore' any incoming pulses that arrive
>during its started timed delay..
>Only after the timed delay, incoming pulses will be read again.
>I need to read any incoming pulses.. always,
>then send them to the output with the set delay.
>JP

If I understand what you want correctly - you want all edges (rising and falling) of your gate
signal to be delayed by the same amount regardless of when they occur?

If so, a PIC should do the job for you.  with 8K bytes of RAM, you have 65536 bits.  You could
shift the input gate through as many bits/bytes as you need.  A little arithmetic says you
should get good resolution even if you use only one bit per byte (0.00061 seconds per delay
sample).  Use all the bits (more complex program) and get 8 times the resolution.  A PIC with
and ADC can read a pot to set the delay time.


> On Wed 19/09/12 11:34 , blacet at blacet.com sent:
>> ---A CMOS one-shot? 4538?
>> 
>> > I'm on my way to design a delayed GATE generator
>> module> for my Dotcom synth.
>> > So I need to delay a 1 bit serial stream
>> (incoming Gate signal)> for up to 5 sec. (my needs). I thought of the
>> shift register way> to do it but I'm not willing to use a ton of
>> cmos IC's..> Maybe a Microchip PIC would do with a reliable
>> interupt routine.> But would it exist any IC that does this job
>> easily> without any programming ?
>> > In fact a 1 bit digital delay without any
>> ADC-DAC is what I need.> Remember, the incoming Gate signal can be
>> anyhthing else> than a simple ON... then OFF state.
>> >  (ex:
>> ON.......OFF..ON..OFF..ON...........OFF...etc..)>
>> > Any clues ?
>> > JP
>> >
>> >
>> >
>> >
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>> > S
>> ynth-diy at dropmix.xs4all.nl> http://dropmix.xs4all.nl/mailman/listinfo/synth-diy>
>> 
>> 
>> 
>> 
>> 
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