[sdiy] 1 bit serial stream delay approaches..

[ChristianH]

Um, that would only work if the ON/OFF events are more apart than the
delay time. Probably not what he wants. And you would need 2
oneshots, one for each edge polarity.

Not sure if there (still) are longer shift registers than 8 bits. Oh
yeah, back in the good old times... 
A couple of years ago you might have misused a BBD for that, SNR should
be sufficient for binary signals :-)

Would I'd probably do: a micro controller, use a 16 bit timer as a
quasi-realtime clock, and a sequencer-like event FIFO. Each input edge
writes a timestamped event record into the fifo, and a read routine
calculates the out event times, and generates the output signal when
that time has come.
Surely this requires programming, but compared to a software implemented
shift register this saves lots of RAM without compromising timing
resolution. But then, I am a programmer from birth, and that may affect
decisions like this...

Chris



On Wed, 19 Sep 2012 07:34:41 -0700 blacet at blacet.com wrote:

> ---A CMOS one-shot? 4538?
> 
> > I'm on my way to design a delayed GATE generator module
> > for my Dotcom synth.
> > So I need to delay a 1 bit serial stream (incoming Gate signal)
> > for up to 5 sec. (my needs). I thought of the shift register way
> > to do it but I'm not willing to use a ton of cmos IC's..
> > Maybe a Microchip PIC would do with a reliable interupt routine.
> > But would it exist any IC that does this job easily
> > without any programming ?
> > In fact a 1 bit digital delay without any ADC-DAC is what I need.
> > Remember, the incoming Gate signal can be anyhthing else
> > than a simple ON... then OFF state.
> >  (ex: ON.......OFF..ON..OFF..ON...........OFF...etc..)
> >
> > Any clues ?
> > JP