[sdiy] Clock noise problem

[Rutger Vlek]

Dear all,

A few years back I built my own version of the Midibox SIDv2 synthesizer (www.ucapps.de), including 8 SID chips and 8 Moog ladder filters that play in a 4-voice full-stereo setup. A demo of how that sounds can be found here: http://www.midibox.org/users/rutgerv/SIDv2_demo.mp3 (everything comes out of the SID synth, except drums).

One problem has been persisting ever since I built the synth, and this is some high-pitched noise on the audio line and headphone outputs. Today I made several attempts to solve that, but I'm a little stuck. Perhaps you could give some advice? With a scope I was able to identify the high-pitched noise as the clock frequency used for the memory bank modules (24LC512). It's picked up somehow in the last opamp circuit (TL074) before the line and headphone outputs. The memory banks (digital) and opamp (analog) are on separate supply and ground lines and properly decoupled, so it's unlikely that the supply is carrying the noise into the TL074 circuit. The whole TL074 circuit, including resistors and filter capacitors (ceramics) is rather close to the set of 24LC512s on the PCB. Is it possible the clock noise is coupling onto the audio outputs purely due to the proximity of the circuits?

Rutger