[sdiy] 1v/oct expo converter front end for SSM2164 quad polevcf..

Jean-Pierre Desrochers jpdesroc at oricom.ca
Fri Mar 30 19:52:11 CEST 2012


I read in the SSM2164 specs:
Gain constant Temperature coefficient: -3300ppm/degC
Could I put a 2 resistors voltage divider 
(with the ground resistor being a 1k +3300ppm TEMPCO)
 rignt between the summing opamp out and the 4 linked CV's inputs
to compensate for the SSM temp drift ?
(The TEMPCO glued to the SSM2164 top)
This way that would only cost me a TEMPCO
and I'd keep the SSM's 4 available stages...?

JP



 On Fri 30/03/12 14:42 , Neil Johnson neil.johnson97 at ntlworld.com sent:
> Hi,
> 
> Jean-Pierre Desrochers wrote:
> > I had not seen the expo voltage to current
> response> embedded for all the CV pins stated in the
> datasheet..> I'll have a look again in the specs.
> 
> The SSM2164 control response is -33mV/dB.  dB is an exponential scale. 
> A doubling of voltage is 6dB, so that means the 2164 is about
> -200mV/octave.
> For something like a VCO you'll also want to compensate it as the 
> control response has a large temperature coefficient.  That's what the 
> schematic that you referred to is doing - the first 2164 gain cell is 
> proving temperature compensation of the CV for the second gain cell, 
> which is providing the current into the saw integrator.
> 
> Cheers,
> Neil
> -- 
> Modules and more :: www.cesyg.comHomepage :: www.njohnson.co.uk
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