[sdiy] CPLD shield for arduino/AMANI 64/AMANI GT

[Brock Russell]

I see, you're not making an MK50240 clone exactly, but making a 
usable top octave generator. That still seems to be quite a trick to 
get the design done to that few cells. I've been thinking of going in 
the opposite direction, using a higher frequency clock and a ten bit 
counter, but the MK50240 type clones I designed use the same divisors 
as the original.

I haven't soldered the Green PAK2 DFNs. I haven't made any boards yet 
as I can't make boards myself with toner transfer that have 0.4mm 
pitch parts and I didn't really want to make some single design 
boards. I finally decided over the weekend to make some DIP adapter 
boards that have battery back up so I can prototype with a bunch of 
devices without having to permanently program the OTP parts. The 
Silego development kit is two parts, the socket board plugs into the 
main board, so I'm making a different socket board with a DIP ZIF 
socket to handle the adapter boards. I should have that up and 
running in a couple of weeks.

Brock

At 10:12 AM 26/03/2012, nvawter at media.mit.edu wrote:
>Heya!!
>
>Glad you noticed- it took a lot of work.  49 was my estimate, but my
>first draft uses 56 of the cells.  Cutting it close!  It has not been
>simulated yet, because I need to learn how to simulate in Quartus.
>The two approaches I used are to compute the minimum accuracy needed
>and to organize the dividers into a tree of chains that have common
>divisors!
>
>hmm checking out Silego programmable parts now.  interesting.  some
>nifty analog components inside those little devices, including an ADC.
>  They might not be so bad for DIY..  they have free development
>software for Win as well as OSX.  They also sell dev sockets.  And,
>they have lots of how-to videos and a $50 dev kit.  They haven have a
>design library for OrCad and Eagle!  Intriguing!
>
>Did you end up solder-mounting your Silego DFNs?
>
>Quoting Brock Russell <brockr0 at shaw.ca>:
>
>>I'm kind of late picking up this thread but I have to ask, how do
>>you create a top octave generator with only 49 cells in a CPLD? The
>>Altera EPM3046A has one flip-flop per macro cell so it seems to me
>>you'd need two of these devices to generate 12 notes.
>>
>>I designed a few MK50240 clones a few months ago using 3 and 4
>>Silego SLG46400 Green PAK2 devices and some CD4504 level shifters.
>>It's actually possible to make a DIP sized plug in replacement. The
>>Silego parts aren't really DIY friendly as they are 2.5mm square 12
>>pin DFNs, but they are very cool devices containing a ton of
>>features in a 28 cent part.
>>
>>Brock
>>
>>
>>At 08:27 AM 15/03/2012, nvawter at media.mit.edu wrote:
>>>Oh, heck yeah!
>>>
>>>My friend and I are currently obsessed with recreating chromatic clock
>>>divider chips.  I think a CPLD would be great for that.
>>>
>>>The Altera EPM5064 on that Arduino CPLD shield has 64 macrocells.  My
>>>estimate for a single octave MK50240 clone is about 49 cells.
>>>
>>>anyone have any other ideas for MK50240 clones that are available in stock?
>>>
>>>
>>>
>>>
>>>Quoting dan snazelle <subjectivity at hotmail.com>:
>>>>
>>>>are there any SYNTH DIY uses for a CPLD/programmable logic?
>>>>
>>>>
>>>>http://majolsurf.net/wordpress/?page_id=368
>>>>
>>>>
>>>>
>>>>
>>>>http://majolsurf.net/wordpress/?page_id=1663
>>>>
>>>>
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>>
>