[sdiy] Idea - Triangle wave DCO core

[jays at aracnet.com]

One thing I wonder about here is interrupt latency.

I assume that we would run an integrator into a comparator which would
generate a signal to reset the integrator via the processor. Normally
you'd run that into an interrupt line on the processor. Then the
processor would service the interrupt and do the reset. For example
depending on the clocking and instructions and interrupt
blocking/priorities you could take maybe 10 clock cycles or maybe 20
clock cycles before the reset is done. Depending on the processor and
clocking that may take ns or it may take us which could affect the
frequency.

Comments, ideas?

Thanks
Jay S.