[sdiy] Generating +5V gate signals from +3.3V logic
Steve Lenham
steve at bendentech.co.uk
Thu Mar 8 11:45:01 CET 2012
> Hmmm, maybe there's something I'm not quite clear on (wouldn't be the
> first time)... Wouldn't the output of an analog switch swing from +V
> (whatever voltage is at the input of the switch) when ON, to a high
> impedance state when OFF? If you really want that output to swing to
> 0V when off, I think you'll need a pull down resistor. Of course, the
> pull down will change the voltage at the output, but that's easy to
> compensate for and should be very repeatable. Still, the analog switch
> method seems pretty straightforward. Other than that, what about a
> non-inverting buffer? Are those capable of level translation?
>
>
> Tim (lost in level translation) Servo
Sorry, I should have been more explicit about what I was suggesting.
WRT the original query about how to get a more precise and stiff (in the
non-varying voltage sense!) gate output, I was imagining:
- a 5.000V reference feeding the input of an analogue switch e.g. 4066,
4053, etc.
- a non-inverting/unity gain opamp output buffer with current limiting
resistor inside the feedback loop.
- the output of the switch connected to both the non-inverting input of
the opamp buffer and a large value (say 1Meg) pulldown resistor to
ground. As long as the on-resistance of the switch is << the pulldown
value, the effect on accuracy will be minimal (e.g. 40ohms into 1Meg
gives 4.9998V).
- the control input of the switch matched to whatever input voltage is
expected; can be less than the gate output voltage if the right switch
family is chosen, or higher with the addition of a potential divider.
Of course there are much simpler methods if you don't care about the
precision of the output voltage.
Cheers,
Steve L.
Benden Sound Technology
www.bendensound.co.uk
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