[sdiy] Generating +5V gate signals from +3.3V logic

[Tim Parkhurst]

On Tue, Mar 6, 2012 at 3:34 PM, Steve Lenham <steve at bendentech.co.uk> wrote:
>
> Yes - as long as you are feeding into a high impedance, you get a very
> well-defined output voltage which IIRC was what you were interested in
> improving. An analogue gate with, say, 40 ohm on-resistance, switching a
> +5.000V reference into a 1Meg impedance will deliver +4.9998V when on and 0V
> when off. Getting such an accurate swing with comparators might be tricky -
> if they are open-collector outputs then they could be pulled-up to an
> accurate reference voltage, but their low voltage is unlikely to be zero.
>
> Both approaches seem to have their advantages!
>

Hmmm, maybe there's something I'm not quite clear on (wouldn't be the
first time)... Wouldn't the output of an analog switch swing from +V
(whatever voltage is at the input of the switch) when ON, to a high
impedance state when OFF? If you really want that output to swing to
0V when off, I think you'll need a pull down resistor. Of course, the
pull down will change the voltage at the output, but that's easy to
compensate for and should be very repeatable. Still, the analog switch
method seems pretty straightforward. Other than that, what about a
non-inverting buffer? Are those capable of level translation?


Tim (lost in level translation) Servo
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