[sdiy] Generating +5V gate signals from +3.3V logic

[Steve Lenham]

>> Why not just use a CMOS analogue switch to gate your chosen
>> reference voltage to the output buffer opamp?
>>
>> If you are using a non-inverting opamp, the input impedance can be
>> made v.high, so switch on-resistance is not an issue and cheap
>> 405x/74HC405x devices can be used.
>
> Interesting. Don't you mean 4016/4066 ?

I was thinking of the 4051/2/3 (multi-pole versions of the 4016/66), 
just because I use them a lot, but the 4016/66 would be fine too.

>> You get three or four switches in a single package
>
> That seems on a par with quad comparators like the LM2901 and
> LM339 : 4 channels per DIP14.

True, but you probably need a handful of passives with the comparator 
approach which the switches might not. Not much of a difference though.

>> plus, if you choose HCT parts they will accept Tom's 3.3V
>> logic without further translation.
>
> My gate outputs usually see a 30 VPP swing at the input. Would
> a 74HCT handle that ?

Er, no. Well, not without a potential divider to reduce that swing, 
which rather negates their low parts count benefit. I came straight from 
talking with Tom about driving gate outputs from a micro running at 
3.3V, but your requirements are rather different so perhaps you are 
better off with the comparators after all.

> I see an advantage to comparators : they lend themselves to
> positive feedback. Useful for generating gates from slow moving
> signals.

Good point.

> Are there advantages to analogue switches besides
> compatibility with 3.3 V logic ?

Yes - as long as you are feeding into a high impedance, you get a very 
well-defined output voltage which IIRC was what you were interested in 
improving. An analogue gate with, say, 40 ohm on-resistance, switching a 
+5.000V reference into a 1Meg impedance will deliver +4.9998V when on 
and 0V when off. Getting such an accurate swing with comparators might 
be tricky - if they are open-collector outputs then they could be 
pulled-up to an accurate reference voltage, but their low voltage is 
unlikely to be zero.

Both approaches seem to have their advantages!

Cheers,

Steve L.