[sdiy] TB303 Slide

[Tim Stinchcombe]

> Can someone with more experience of the guts of TB303s 
> demonstrate the 
> timing between the gate pulse, the slide pulse and the latch 
> for the DAC?
> 
> I'm going to build a clone of the DAC and slide circuit, and 
> measure the 
> damned thing for myself.  Clearly getting the timing of the 
> pulses right 
> will be key to this endeavour.

Here is some of what my extensive trawling of the AH & SDIY archives a few
weeks ago dug up.

The useful Robin Whittle post is here (probably linked somewhere from the
link Tom posted previously - I think I also came across it in the AH
archives):

http://www.firstpr.com.au/rwi/dfish/303-slide.html

Note in there he suggests the gate on/off times are not 50:50, but 3.5:2.5
(out of 6!) - however this 'scope shot':

http://ultra303.ultrafex.de/twonotesslide.jpg

seems to contradict that, showing it to be 50:50. Here is the referring page
with some chit-chat:

http://ultra303.ultrafex.de/diary.phtml

That the slide line also triggers the latch for the DAC is obvious from the
schemo, but this post  apparently measures the pulse at only 50us wide:

http://search.retrosynth.com/ah/search/lookit.cgi?-v9708.1024

(both browsers I use don't show the greek 'mu' properly, but copy-pasting
into Textpad shows it to be just that, i.e. mu for 'micro', and 50us seems
quite consistent with the instruction cycle time of the processor). If we
assume the worst case jump of 5.33V for the (non!) slid note change, the cap
is only able to charge by 12mV in the 50us, i.e. about a seventh of a
semitone - thus even if the VCO attempted to respond to this, I think it
highly unlikely that it would be audible as any sort of 'slide' or wobble
between the notes concerned (if it is audible, the word 'glitch' comes more
to mind!). (And then of course when the 50us is up, as there *is* no slide,
we get the huge 5.33V jump any way...) Of course none of this takes into
account how the 4066 switches are able to react/not react to the 50us pulse
etc.

I have also no idea whether there are any sorts of latencies of all the edge
changes etc. as they  pass through the chips concerned.

It is also reasonably easy to analyse the DAC R-2R ladder to show that
indeed its output impedance is just 'R', = 100k, regardless of what the
voltages at the six 4174 pins are, and indeed I have also confirmed that
such analysis is correct by comparison with a SPICE simulation of the
circuit.

(Really makes me wish I could get my mitts on a TB-303 so that I could take
my own measurements!)

Tim
__________________________________________________________
Tim Stinchcombe 

Cheltenham, Glos, UK
email: tim102 at timstinchcombe.co.uk
www.timstinchcombe.co.uk