[sdiy] Buffer question

[ASSI]

On Monday 30 January 2012, 16:01:53, Oren Leavitt wrote:
> I would buffer it and level shift it to +/-5V with an op amp.
> CMOS will latch and release the "magic smoke" if something in the
> "outside world" pulls its output above the Vdd pin.

CMOS chips that you can still buy will usually be fairly tolerant of not-
too-large positive overvoltage, negative voltage on an output is much more 
dangerous.  That said, if you limit the current to below some critical value 
no latchup will occur in either case.  The total of all such currents per 
chip needs to be kept, say, below 50mA peak DC and at least a factor of 3 
less for current spikes — the trigger current for the parasitic SCR is 
usually controlled to be well above 100mA by the manufacturer.  You may need 
to limit the current per output further to avoid burning out the ESD 
protection diodes that most chips will have.  So putting 1k...10k in series 
with each output is typically all that it takes to protect them.  Keep those 
series resistors very close to the pin, though.


Regards,
Achim.
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