[sdiy] Nice info on decoupling caps

[Tom Farrand]

Richie,

Ground planes on the outside and burying signals is SOP in my world.
Most of my products are six or eight layers.  The point is to keep a
very low EMC profile for CISPR11 and 22.  When using faster processors
like OMAPs, the signature is hard to contain.  Top and bottom planes
do that nicely.  Another advantage to that is heat-sinking.  With a
large plane on an exposed surface, heat removal is easier.  Inner
plane layers for heat removal are problematic even with stitching a
matrix of vias.  Yes, debugging is the worst possible nightmare with
this approach.  We do pretty heavy-duty reviews before spinning a
board and that minimizes the nightmares, though they do happen and
they are very painful.  But once one goes beyond 4 layers, it is a
nightmare regardless.  For medical products, pretty much every net
must appear on a via for probing and that helps a board bring-up.  In
the end, one must do what is task appropriate and what might be
appropriate for a medical product is inappropriate for other products.

Peace.
Tom Farand

On Fri, Jan 20, 2012 at 8:44 AM, Richie Burnett
<rburnett at richieburnett.co.uk> wrote:
>
> I mostly use this technique on high speed digital boards where Radiated
> Emissions compliance can be a problem, particularly with the modern trend for
> putting things in molded plastic enclosures!  I've used it to good effect in
> Industrial, Instrumentation and Clinical Diagnostic applications.
>
> As Harry rightly pointed out, it does have its downsides though.  It's a bugger
> to fault find because you can't see the burried signal traces, and you need to
> put thought into bringing out test points at the design stage.  It's also not
> great for power electronics boards because modern surface mount components get
> rid of their heat through conduction to the copper tracks leading away from the
> device.  This conduction cooling mechanism is less effective through vias unless
> you use a via cluster.
>
> I wasn't suggesting that everyone design all their PCBs as four layer boards
> using this technique, as much as using it as a teaching aid.  It shows how you
> can get extremely low supply stray inductance, whilst simultaneously screening
> sensitive circuit nodes and shielding noisey nodes against potential radiated
> emmisions.  As with all things in engineering you do as little as you need to in
> order to arrive at a satisfactory solution.
>
> -Richie,
>
>
> Richie, on a four layer board I've always seen power and ground on the internal
> planes with the signals on the two outer layers.  Not the other way round.
> Where is the method you described used?
>
> -Dave
>
>
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