[sdiy] Matched transistors - critical parameters?

[ASSI]

On Thursday 09 February 2012, 15:56:56, Tom Wiltshire wrote:
> > "8.   The DC Current Gain, hFE, (matched at IC = 10mA and VCE = 5V)
> > Collector Emitter Saturation Voltage, VCE(SAT), and Base Emitter
> > Saturation Voltage, VBE(SAT) are matched with typical matched
> > tolerances of 1% and maximum of 2%."

> Is that good or not?

Vbe(sat) should be around 700mV, so 2% of that is 14mV.

> I'm not familiar with the standards that are expected
> of matched transistors, so I'd like to know if that represents a decent
> level of matching, a good level, or a poor level.

For discretes this can be considered fair but not exciting.  The typical 
values you can expect are probably a lot better than 14mV, though — 
otherwise they couldn't guarantee the 2% value without actually measuring 
and selecting.  Assuming a zero median on the Vbe matching and normal 
distribution a sigma of 2.8mV would make about 6 parts in a million match 
worse than 14mV.

> I'm guessing that you wouldn't do much better by hand, unless you got
> really autistic about it.

You can do quite a bit better than 1mV by hand using the balanced bridge 
measurement method; Ian Fritz routinely matches to tens-of-micro-Volt 
levels(*).

Starting with a bag of duals with the distribution outlined above it would 
even be easy, since about every fifth should match better than 1mV and only 
every tenth would be outside 5mV — you wouldn't get too bored stuffing a 
Moog ladder, say.  About one in hundred would even match to Ians exactness 
of 50µV... but that is better left to monolithic integrated transistors.

(*) http://home.comcast.net/~ijfritz/projects/transmat001.pdf


[you can safely skip this]
When I was on the test floor (IIRC, it's been a while) we wouldn't bother to 
make the selection bin nominally wider than maybe 5mV depending on where in 
the distribution we were selecting and how fast the bin needed to fill.  
Most often that was all the matching required, but sometimes we'd sort those 
pre-selected transistors again to some tighter tolerance on the "slow but 
precise" tester and maybe on some different parameters as well to make 
precision pairs (we mostly had requests for pairs).  Noise and limited 
resolution on the tester would preclude going better than about 0.25mV, so 
anything beyond that you'd do by hand.  Using a tight pre-selection 
criterion had the advantage that you could get matched quad or even octal 
sets of transistors in a reasonable time.  We would also have some fun 
selecting for hfe of exactly 100.0 or similarly silly numbers if there was 
nothing better to do (and then check it by hand if we got really bored — 
uncovered some drifting calibration this way :-).


Regards,
Achim.
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