[sdiy] current conveyor?

[ASSI]

On Monday 06 February 2012, 22:51:27, ASSI wrote:
> That's actually an easier thing to do, since you simply want to level
> shift that current signal from 0V down to -5V — use a FET cascode
> transistor.  For an nMOS (enhancement, not JFET), the gate would be kept
> one Vth above -5V and everything else takes care of itself.  Now, Vth
> changes with temperature and is different for each transistor, so you'll
> have to put on a regulator that keeps the drain side at 0V to keep the
> 2164 happy.

There will probably be another (pMOS) cascode needed at the 0V side if the 
range of currents gets large and the channel resistance of the nMOS can't 
track so that the voltage drop is always 5V at the lower end of currents.  
Also, I won't figure out today (if ever) what happens when the 2164 wants to 
pull in current...


Regards,
Achim.
-- 
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