[sdiy] Fast envelope generation

Neil Johnson neil.johnson97 at ntlworld.com
Tue Dec 18 16:55:51 CET 2012


> No, I don't think there's any confusion, but my bet is you're both on platforms with nice wide number formats. Scott's on FPGA, and can make his variables as wide as he wants - 32, 48-bits, whatever - and I bet he does.
> The trouble with doing IIR on a little 8-bit uP is maintaining accuracy. If you use long multi-byte variables, you finish up needing to do long multi-byte multiplications - slow, especially on a PIC with no multiply instruction. If you *don't* use long variables, the accuracy goes to pot.
> At one point I looked into IIR for this job, and I needed better than 32-bit to get the range of delay times I needed. Though the  calculation is "simple", it finished up needing more lines of code for the multiply than the simple table-lookup-with-interp. The advantage of that method is that you can easily change the times and the curves shapes without any worries about the accuracy.

If you can play tricks with sample rate then you can use shifts for the divide.
And for straight lines, Bresenham's algorithm explicity does not use
multiplies or divides (other than a /2 at the start).

Or were you thinking of something else?

Modules and more: http://www.cesyg.com
Homepage: http://www.njohnson.co.uk

More information about the Synth-diy mailing list