[sdiy] Fast envelope generation

[Tom Wiltshire]

Hi Jim, and welcome!

> I've also hit a barrier with the type of DAC I've been using: there
> seems to be an inherent latency in the delta-sigma based DAC in the
> dsPIC of around 120uS.   Hopefully a new design based on an R2R DAC will
> get rid of this issue. 

That's an interesting finding. 120uS is almost a whole cycle at 8KHz, which you might not have expected from an audio DAC.

I've played with this DAC quite a lot and not seen the effect you mention (though I wasn't ever looking specifically). I don't remember ever being surprised by delays between the gate and the envelope though.

Is this latency measured between gate-going-in and attack-coming-out, in which case the delay could be in the code not the DAC, or are you sure it's the DAC? I suppose a test to be sure would be easy enough to do; set an IO high and pass a sample to the DAC, and then measure on the scope to see which happens first. But the DAC is usually one sample behind, so don't be surprised to see at least 1 sample of delay.

 What's the sample rate? How fast is the chip clocked? Is the DAC fed using DMA or directly? Finally, the DAC uses oversampling and filtering, which tends to smooth out *extremely* abrupt transients - but I've not seen problems with curves down to 300uS or so.

Regards,
Tom